My research has until recently involved parallel computer
communication architecture modelling including work with asynchronous synthesisable
VHDL. Recently I have embarked on a newer research area: Evolutionary Hardware.
I am continuing to work in both these areas although my current focus is
on evolutionary hardware.
A copy of my PhD within Parallel Computer Communication Hardware Modelling
is now available on the net .
Last modified: Mon May 3 15:51:41 MET DST 1999